
Miniaturised 2×2 Software Defined Radio built around Analog Devices AD9361 integrated RF Agile Transceiver™ and the Xilinx Z-7020 Zynq®-7000 All Programmable SoC. Build a complete wireless communication product on a single compact board — RF through to baseband processing — with 70 MHz to 6 GHz coverage and 200 KHz to 56 MHz bandwidth.
| Processor | Dual-Core ARM Cortex-A9 MPCore up to 866 MHz |
|---|---|
| Programmable Logic | 74k Logic Cells |
| RAM | 1 Gb DDR3L |
| Flash | 256 Mb QSPI |
| Interfaces | UART, 16 GPIO pins, Aux ADC input (@1 MSPS) |
| DC Input | 5 V |
| Power Consumption | ~4 W |
| No. of Tx / Rx Channels | 2 / 2 |
| Frequency Range | 70 MHz to 6 GHz |
| Bandwidth | 200 KHz to 56 MHz |
| Tx Power | Up to 10 dBm |
| Tx Noise Floor Isolation | 50 dB (TX1↔TX2) |
| Rx Automatic Gain Control | Up to 74.5 dB |
| Rx Noise Floor Isolation | Up to 70 dB (RX1↔RX2) |